For leading-edge devices such as RF ICs, increasing frequency, package density, and thermal issues offer significant challenges to designing effective socket and load-board solutions for test.

The industry’s insatiable need for power in high-performance computing (HPC) is creating problems for test cells, which need to deliver very high currents at very consistent voltage levels through the ...

Parallel test is used for nearly every device produced by fabs and OSATs, but it can reduce yield and increase the cost of test boards and operations. This is a well-understood tradeoff for ensuring ...

A few years ago, the semiconductor lingo for automated test equipment (ATE) PCBs was “load boards.” But more recently, they’ve become increasingly known in semiconductor parlance as “device interface ...

Test Devices has developed a strain survey technique for high-speed rotating parts designed to overcome the problem of high g-loads affecting instrumentation. Strain surveys enable engineers to ...