Semiconductor Engineering

Using IP-XACT To Solve Design And Verification Problems

As today’s SoC designs grow more complex and time-to-market (TTM) pressures rise, designers are looking for techniques to build and update designs easily. Key elements for addressing these SoC ...
Semiconductor Engineering

Why Every Design IP Needs A Complete QA Methodology

Design IP is a key contributor to innovation in the semiconductor industry today. As the complexity and scale of silicon designs increase, so does design and verification time. Design IP enables ...
Design-Reuse

Using IP-XACT Metadata for a TLM Modeling Flow

Many design organizations are evolving their flows to an Executable Live Specification (ELS) driven methodology and making huge gains in designer productivity because of increased and coherent ...
EDN

Platform-based design: Higher productivity for IP reuse

Intellectual property (IP) reuse is a strategy employed by design groups to create complex designs more quickly by leveraging the expert knowledge embodied in existing functional blocks. The ...
Design-Reuse

IP-Reuse and Platform Base Designs

Prevailing IP-Reuse methodologies are based on sharing designs at either Physical level called Hard-IP or at RTL level using HDL models called Soft-IP. Design re-use based on RTL based Soft-IP has ...