EDN

Mastering the embedded software design cycle

Creating embedded software can be a challenging endeavor. The experience can range from a well-defined and controlled process to shoot-from-the-hip Wild West-style development. No matter where ones ...
Semiconductor Engineering

How To Safeguard Memory Interfaces By Design

In 2017, the credit bureau Equifax announced that hackers had breached its system, unleashing the personal information of 147-million people. As a result, the company has settled a class action suit ...
Semiconductor Engineering

Easy-To-Use Reliability Checks Throughout The Design Cycle From IP To Full-Chip Tapeout

With the increasing complexity of design layouts and shorter tapeout cycles, waiting until signoff verification is no longer practical for design teams. There is a constant push to shift targeted ...
Electronic Design

Conquer Signal and Power Challenges When Implementing GDDR6 Interfaces

Issues in GDDR6 design. In-design analysis for signal integrity and power integrity. Innovative workflow for GDDR6 design and analysis. Graphics processing units (GPUs) and graphics double-data-rate ...
Electronic Design

Physically Aware Network-on-Chip Streamlines SoC Design Cycle

This video is part of TechXchange Talks. Arteris IP has released FlexNoC 5, a network-on-chip (NoC) IP configuration tool, designed to improve system-on-chip (SoC) designs and streamline the design ...