That big grandfather clock in the library might be an impressive piece of mechanical ingenuity, and an even better example of fine cabinetry, but we’d expect that the accuracy of a pendulum timepiece ...

The purpose of a phase locked loop (PLL) is to generate a frequency and phase-locked output oscillation signal. To achieve this goal, prior art essentially functioned ...

The NB4N507A is a fully integrated phase lock loop (PLL) designed to replace expensive crystal oscillators for clock generation in a variety of consumer and networking applications. The IC generates a ...

When Hackaday runs a contest, we see all manner of clever projects. But inevitably there are some we don’t see, because their builders didn’t manage to get them finished in time. [Park Frazer]’s phase ...

Scientists have developed an advanced phase-locked loop (PLL) frequency synthesizer that can drastically cut power consumption. This digital PLL could be an attractive building block for Bluetooth Low ...

One of the most challenging tasks in analog circuit design is to adapt a functional block to ever new CMOS process technology. For digital circuits the number of gates per square mm approx. doubles ...

…which would take a pulse-width-modulated waveform at any frequency, and produce a signal with exactly the same mark/space ratio, but at a nominated frequency (see ‘Why might this be useful?’ below).

This application note discusses phase frequency detector characteristics that affect phase-locked loop (PLL) dead band and jitter performance. In PLLs that employ charge pump loop filter designs the ...

I have always had a soft spot for phase-locked loops – at least, I have since I first found out what they were. What I like about them is that they servo into the best answer for a given situation – ...