EDN

Power dissipation in portables: Design considerations using low-power CMOS ICs

When a CMOS circuit is in an idle state there is still some static power dissipation–a result of leakage current through nominally off transistors. Both nMOS and pMOS transistors used in CMOS logic ...
EDN

Estimating Power Dissipation in CMOS Devices

This application note describes ways to estimate power dissipation of individual CMOS logic devices in a system. It will help users determine if their designs raise any power dissipation concerns. Due ...
Nature

Low-Power CMOS Flip-Flop Design and Power Management

Recent advances in Complementary Metal-Oxide-Semiconductor (CMOS) technology have underscored the importance of power-efficient flip-flop designs for modern electronic systems. Over recent years, ...
TechRepublic

Full Custom Design of Low Power 8-bit Magnitude Comparator with Small Transistor Count by Static CMOS

Comparator is the basic module in digital system. It is widely used in communication and calculation areas. This paper is to provide new low power, area solution for Very Large Scale Integration (VLSI ...
Nanowerk

CMOS Technology Explained

Complementary Metal-Oxide-Semiconductor (CMOS) technology is a vital part of modern electronics, used in designing and manufacturing integrated circuits (ICs) that power many digital devices. CMOS ...
Design-Reuse

Power Reduction Techniques for Ultra-Low-Power Solutions

The consumer demand for greater functionality and higher performance, but also for lower costs adds significant pressure on System-on-Chip (SoC) manufacturers. The continuing advances in process ...
Electronic Design

SiGe BiCMOS Vs. CMOS For Signal Conditioning

Texas Instrument's Richard Zarr reviews the differences between Silicon-Germanium BiCMOS and small-geometry CMOS when it comes to driving high-speed data transmission lines. The CMOS process was the ...